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Zephyr project on STM32

   Zephyr Workbench, a VSCode extension to manage Zephyr on STM32.
It enables users to easily create, develop, and debug Zephyr applications.
Main features:
  • Install host dependencies.
  • Import toolchain and SDK.
  • Create, configure, build and manage apps.
  • Debug STM32.
You can directly download it from the VSCode marketplace
For more details, visit the Zephyr Workbench

System Workbench for STM32


ldmia instruction is causing an exception on Nucleo-F103RB board

France

Hi,

Where is data located? Is it close to the end of memory? Does it work also with {r0-r4} (as many registers that {r4-r8} ?

The xPSR should not have any effect there so changing it could not solve your problem; we really need a bit more information on your problem to help but the only thing I could think of is:

  1. The alignment of data (is it correctly 4-byte aligned?)
  2. The size of the transfer (is there effectively 5*4 = 20 bytes of data there).


Regarding the CPSR, which on a Cortex-M is in fact the xPSR, it does not have to be initialized and the core is executing in privileged thread mode on reset, and stay in this mode unless the CONTROL register is modified to switch to non-privileged mode (but neither HAL nor StdPeriph or even FreeRTOS change that).

Bernard (Ac6)
Bernard (Ac6)