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ldmia instruction is causing an exception on Nucleo-F103RB board

Recently I tried to execute that code:

mov r0, =data
ldmia r0, {r4-r8}

And it generates an exception. The handler WWDG_IRQHandler is getting called, causing an infinite loop. If I try that instruction with lower registers (r0-r3 for example), it works. I assume the problem is the security level. How can I modify the CPSR register? Where is the initialization routine, which sets the contents of CPSR? How can I modify it?
Thanks in advance.



Where is data located? Is it close to the end of memory? Does it work also with {r0-r4} (as many registers that {r4-r8} ?

The xPSR should not have any effect there so changing it could not solve your problem; we really need a bit more information on your problem to help but the only thing I could think of is:

  1. The alignment of data (is it correctly 4-byte aligned?)
  2. The size of the transfer (is there effectively 5*4 = 20 bytes of data there).

Regarding the CPSR, which on a Cortex-M is in fact the xPSR, it does not have to be initialized and the core is executing in privileged thread mode on reset, and stay in this mode unless the CONTROL register is modified to switch to non-privileged mode (but neither HAL nor StdPeriph or even FreeRTOS change that).

Bernard (Ac6)
Bernard (Ac6)

Thank you, dautrevaux, for the quick answer.
Indeed, the problem was the alignment of the data. I forgot the LDM/STM instructions require the memory to be properly aligned.

My code is now like that:

ldr r0, =data
ldmia r0, {r4-r9}
.align 2
data: .word 0x4, 0x5, 0x6, 0x7, 0x8, 0x9