STLINK v2 reset not working, unable to program/debug
Hello,
I have a problem programming my stm32f103c8t6. The reset of the STlink V2 is not pulled down (I checked using a logic analyser). Everything works fine when I use the ST link utility but I need the debug functionality.
I already read this whole thread and tried every solution offered:
- Veriefied that no debug session is running and removed all previous debug sessions
- Checked if openocd.exe is running in background (it isn’t)
- modiefied custom debug cgf file “reset_config srst_only srst_nogate” to “reset_config srst_nogate” and selected this file in debug configuration window. reset pin isn’t pulled low and I get the same error
- reinstalled system workbench (defauld install location)
- tried debug configuration->manual spec bith ST-LinkV2 and ST-LinkV2-1 SWD
Please help I’m out of options and willing to try anything, thanks in advance.
I get this error:
””“”“”“””
Error in final launch sequence
Failed to execute MI command:
load C:\Users\Tom\workspace\test\Debug\test.elf
Error message from debugger back end:
Error erasing flash with vFlashErase packet
Error erasing flash with vFlashErase packet
””“”“”“””
console:
””“”“”“””
Open On-Chip Debugger 0.10.0-dev-00267-g884c33c (2016-03-16-12:22)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_assert_srst
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.236436
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: timed out while waiting for target halted
TARGET: stm32f1x.cpu - Not halted
in procedure ‘program’
in procedure ‘reset’ called at file “embedded:startup.tcl”, line 478
in procedure ‘ocd_bouncer’
- Unable to reset target **
shutdown command invoked
””“”“”“””
Full console log with -d command
Open On-Chip Debugger 0.10.0-dev-00267-g884c33c (2016-03-16-12:22)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 4 command.c:546 command_print(): debug_level: 3
Debug: 14 4 options.c:98 add_default_dirs(): bindir=/usr/bin
Debug: 15 4 options.c:99 add_default_dirs(): pkgdatadir=/usr/share/openocd
Debug: 16 4 options.c:100 add_default_dirs(): run_prefix=C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.8.0.201603291052/tools/openocd/bin
Debug: 17 4 configuration.c:44 add_script_search_dir(): adding C:\Users\Tom\AppData\Roaming/OpenOCD
Debug: 18 5 configuration.c:44 add_script_search_dir(): adding C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.8.0.201603291052/tools/openocd/bin/usr/share/openocd/site
Debug: 19 6 configuration.c:44 add_script_search_dir(): adding C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.8.0.201603291052/tools/openocd/bin/usr/share/openocd/scripts
Debug: 20 9 configuration.c:84 find_file(): found .custom.cfg
Debug: 21 11 configuration.c:84 find_file(): found C:\Ac6\SystemWorkbench\plugins\fr.ac6.mcu.debug_1.8.0.201603291114\resources\openocd\scripts/interface/stlink-v2.cfg
Debug: 22 12 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 12 command.c:145 script_debug(): command - interface ocd_interface hla
Debug: 25 13 command.c:366 register_command_handler(): registering ‘ocd_hla_device_desc’...
Debug: 26 13 command.c:366 register_command_handler(): registering ‘ocd_hla_serial’...
Debug: 27 13 command.c:366 register_command_handler(): registering ‘ocd_hla_layout’...
Debug: 28 13 command.c:366 register_command_handler(): registering ‘ocd_hla_vid_pid’...
Debug: 29 13 command.c:366 register_command_handler(): registering ‘ocd_hla_command’...
Debug: 30 14 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
Debug: 31 14 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink
Debug: 33 14 hla_interface.c:241 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
Debug: 35 15 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
Debug: 37 15 hla_interface.c:215 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
Debug: 39 16 command.c:145 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
Debug: 41 16 hla_interface.c:269 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
Debug: 42 16 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
Debug: 43 16 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
Debug: 44 17 hla_transport.c:193 hl_transport_select(): hl_transport_select
Debug: 45 17 command.c:366 register_command_handler(): registering ‘ocd_hla’...
Debug: 46 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 47 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 48 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 49 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 50 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 51 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 52 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 53 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 54 17 command.c:366 register_command_handler(): registering ‘ocd_jtag’...
Debug: 55 19 command.c:366 register_command_handler(): registering ‘ocd_jtag_ntrst_delay’...
Debug: 56 19 configuration.c:84 find_file(): found C:\Ac6\SystemWorkbench\plugins\fr.ac6.mcu.debug_1.8.0.201603291114\resources\openocd\scripts/target/stm32f1x_stlink.cfg
Debug: 57 19 configuration.c:84 find_file(): found C:\Ac6\SystemWorkbench\plugins\fr.ac6.mcu.debug_1.8.0.201603291114\resources\openocd\scripts/target/stm32f1x.cfg
Debug: 58 20 configuration.c:84 find_file(): found C:\Ac6\SystemWorkbench\plugins\fr.ac6.mcu.debug_1.8.0.201603291114\resources\openocd\scripts/target/swj-dp.tcl
Debug: 59 21 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 60 21 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 61 21 configuration.c:84 find_file(): found C:\Ac6\SystemWorkbench\plugins\fr.ac6.mcu.debug_1.8.0.201603291114\resources\openocd\scripts/mem_helper.tcl
Debug: 62 22 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
Debug: 63 22 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
Debug: 65 22 command.c:1100 help_add_command(): added ‘mrw’ help text
Debug: 66 23 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
Debug: 67 23 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
Debug: 69 23 command.c:1113 help_add_command(): added ‘mrw’ help text
Debug: 70 24 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
Debug: 71 24 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
Debug: 73 24 command.c:1100 help_add_command(): added ‘mmw’ help text
Debug: 74 25 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 75 25 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 77 25 command.c:1113 help_add_command(): added ‘mmw’ help text
Debug: 78 26 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 79 26 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 80 26 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 81 26 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 82 27 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 83 27 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 84 27 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 85 27 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 86 28 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm32f1x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 87 28 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap stm32f1x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 88 29 hla_tcl.c:118 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32f1x, Tap: cpu, Dotted: stm32f1x.cpu, 8 params
Debug: 89 29 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irlen
Debug: 90 29 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -ircapture
Debug: 91 29 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irmask
Debug: 92 29 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 93 29 core.c:1306 jtag_tap_init(): Created Tap: stm32f1x.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 94 30 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 95 30 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 96 30 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create stm32f1x.cpu cortex_m -endian little -chain-position stm32f1x.cpu
Debug: 97 31 command.c:145 script_debug(): command - ocd_target ocd_target create stm32f1x.cpu cortex_m -endian little -chain-position stm32f1x.cpu
Info : 98 31 target.c:5223 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Debug: 99 31 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 100 32 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 101 32 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 102 32 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 103 32 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 104 33 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 105 33 command.c:366 register_command_handler(): registering ‘ocd_arm’...
Debug: 106 33 command.c:366 register_command_handler(): registering ‘ocd_tpiu’...
Debug: 107 33 command.c:366 register_command_handler(): registering ‘ocd_itm’...
Debug: 108 33 command.c:366 register_command_handler(): registering ‘ocd_itm’...
Debug: 109 34 hla_target.c:353 adapter_target_create(): adapter_target_create
Debug: 110 34 hla_target.c:324 adapter_init_arch_info(): adapter_init_arch_info
Debug: 111 34 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 112 34 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 113 34 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 114 35 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 115 35 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 116 35 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 117 35 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 118 36 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 119 36 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 120 36 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 121 36 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 122 37 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 123 37 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 124 38 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 125 38 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 126 38 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 127 39 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 128 39 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 129 40 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 130 41 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 131 42 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 132 42 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 133 42 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 134 42 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 135 43 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 136 44 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 137 46 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 138 49 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 139 50 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 140 51 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 141 51 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x.cpu’...
Debug: 142 51 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
Debug: 143 52 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
Debug: 144 52 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 145 53 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 146 53 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 147 53 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32f1x.flash stm32f1x 0x08000000 0 0 0 stm32f1x.cpu
Debug: 148 54 command.c:145 script_debug(): command - ocd_flash ocd_flash bank stm32f1x.flash stm32f1x 0x08000000 0 0 0 stm32f1x.cpu
Debug: 150 54 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x’...
Debug: 151 55 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x’...
Debug: 152 55 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x’...
Debug: 153 55 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x’...
Debug: 154 55 command.c:366 register_command_handler(): registering ‘ocd_stm32f1x’...
Debug: 155 56 tcl.c:1031 handle_flash_bank_command(): ‘stm32f1x’ driver usage field missing
Debug: 156 56 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
Debug: 157 56 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
Debug: 159 57 core.c:1633 jtag_config_khz(): handle jtag khz
Debug: 160 57 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 161 57 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 162 57 command.c:546 command_print(): adapter speed: 1000 kHz
Debug: 163 57 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
Debug: 164 58 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
User : 166 58 command.c:546 command_print(): adapter_nsrst_delay: 100
Debug: 167 58 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 168 58 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 169 59 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate connect_assert_srst
Debug: 170 59 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate connect_assert_srst
User : 172 59 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_assert_srst
Debug: 173 59 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 174 60 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 175 60 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event examine-end
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 176 60 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event examine-end
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 177 61 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event gdb-attach
# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
reset init
Debug: 178 62 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event gdb-attach
# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
reset init
Debug: 179 62 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
Debug: 180 63 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
Debug: 181 63 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate
Debug: 182 64 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate
User : 184 64 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_assert_srst
Debug: 185 64 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
Debug: 186 65 command.c:145 script_debug(): command - gdb_port ocd_gdb_port 3333
Debug: 188 66 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 189 66 command.c:145 script_debug(): command - init ocd_init
Debug: 191 66 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 192 67 command.c:145 script_debug(): command - ocd_target ocd_target init
Debug: 194 67 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 195 67 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 196 67 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu cget -event gdb-flash-erase-start
Debug: 197 68 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu cget -event gdb-flash-erase-start
Debug: 198 68 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event gdb-flash-erase-start reset init
Debug: 199 68 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event gdb-flash-erase-start reset init
Debug: 200 69 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu cget -event gdb-flash-write-end
Debug: 201 69 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu cget -event gdb-flash-write-end
Debug: 202 70 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu configure -event gdb-flash-write-end reset halt
Debug: 203 70 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu configure -event gdb-flash-write-end reset halt
Debug: 204 70 target.c:1308 handle_target_init_command(): Initializing targets...
Debug: 205 70 hla_target.c:343 adapter_init_target(): adapter_init_target
Debug: 206 70 command.c:366 register_command_handler(): registering ‘ocd_target_request’...
Debug: 207 71 command.c:366 register_command_handler(): registering ‘ocd_trace’...
Debug: 208 71 command.c:366 register_command_handler(): registering ‘ocd_trace’...
Debug: 209 71 command.c:366 register_command_handler(): registering ‘ocd_fast_load_image’...
Debug: 210 71 command.c:366 register_command_handler(): registering ‘ocd_fast_load’...
Debug: 211 71 command.c:366 register_command_handler(): registering ‘ocd_profile’...
Debug: 212 71 command.c:366 register_command_handler(): registering ‘ocd_virt2phys’...
Debug: 213 72 command.c:366 register_command_handler(): registering ‘ocd_reg’...
Debug: 214 72 command.c:366 register_command_handler(): registering ‘ocd_poll’...
Debug: 215 72 command.c:366 register_command_handler(): registering ‘ocd_wait_halt’...
Debug: 216 72 command.c:366 register_command_handler(): registering ‘ocd_halt’...
Debug: 217 72 command.c:366 register_command_handler(): registering ‘ocd_resume’...
Debug: 218 73 command.c:366 register_command_handler(): registering ‘ocd_reset’...
Debug: 219 73 command.c:366 register_command_handler(): registering ‘ocd_soft_reset_halt’...
Debug: 220 73 command.c:366 register_command_handler(): registering ‘ocd_step’...
Debug: 221 73 command.c:366 register_command_handler(): registering ‘ocd_mdw’...
Debug: 222 73 command.c:366 register_command_handler(): registering ‘ocd_mdh’...
Debug: 223 74 command.c:366 register_command_handler(): registering ‘ocd_mdb’...
Debug: 224 74 command.c:366 register_command_handler(): registering ‘ocd_mww’...
Debug: 225 74 command.c:366 register_command_handler(): registering ‘ocd_mwh’...
Debug: 226 74 command.c:366 register_command_handler(): registering ‘ocd_mwb’...
Debug: 227 74 command.c:366 register_command_handler(): registering ‘ocd_bp’...
Debug: 228 74 command.c:366 register_command_handler(): registering ‘ocd_rbp’...
Debug: 229 74 command.c:366 register_command_handler(): registering ‘ocd_wp’...
Debug: 230 75 command.c:366 register_command_handler(): registering ‘ocd_rwp’...
Debug: 231 75 command.c:366 register_command_handler(): registering ‘ocd_load_image’...
Debug: 232 75 command.c:366 register_command_handler(): registering ‘ocd_dump_image’...
Debug: 233 75 command.c:366 register_command_handler(): registering ‘ocd_verify_image’...
Debug: 234 75 command.c:366 register_command_handler(): registering ‘ocd_test_image’...
Debug: 235 76 command.c:366 register_command_handler(): registering ‘ocd_reset_nag’...
Debug: 236 76 command.c:366 register_command_handler(): registering ‘ocd_ps’...
Debug: 237 76 command.c:366 register_command_handler(): registering ‘ocd_test_mem_access’...
Debug: 238 76 hla_interface.c:111 hl_interface_init(): hl_interface_init
Debug: 239 76 hla_layout.c:85 hl_layout_init(): hl_layout_init
Debug: 240 76 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 241 76 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 242 77 stlink_usb.c:1663 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
Debug: 243 77 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 244 77 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 245 77 stlink_usb.c:1663 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
Info : 246 77 core.c:1388 adapter_init(): clock speed 950 kHz
Debug: 247 77 openocd.c:137 handle_init_command(): Debug Adapter init complete
Debug: 248 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 249 78 command.c:145 script_debug(): command - ocd_transport ocd_transport init
Debug: 251 78 transport.c:240 handle_transport_init(): handle_transport_init
Debug: 252 78 hla_transport.c:154 hl_transport_init(): hl_transport_init
Debug: 253 78 hla_transport.c:171 hl_transport_init(): current transport hla_swd
Debug: 254 78 hla_interface.c:44 hl_interface_open(): hl_interface_open
Debug: 255 78 hla_layout.c:42 hl_layout_open(): hl_layout_open
Debug: 256 79 stlink_usb.c:1697 stlink_usb_open(): stlink_usb_open
Debug: 257 79 stlink_usb.c:1714 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x3748 serial:
Info : 258 197 stlink_usb.c:618 stlink_usb_version(): STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
Info : 259 197 stlink_usb.c:1825 stlink_usb_open(): using stlink api v2
Debug: 260 198 stlink_usb.c:817 stlink_usb_init_mode(): MODE: 0x00
Info : 261 252 stlink_usb.c:650 stlink_usb_check_voltage(): Target voltage: 3.240158
Debug: 262 252 stlink_usb.c:872 stlink_usb_init_mode(): MODE: 0x01
Debug: 263 254 stlink_usb.c:898 stlink_usb_init_mode(): MODE: 0x02
Debug: 264 254 stlink_usb.c:1840 stlink_usb_open(): Supported clock speeds are:
Debug: 265 254 stlink_usb.c:1843 stlink_usb_open(): 4000 kHz
Debug: 266 255 stlink_usb.c:1843 stlink_usb_open(): 1800 kHz
Debug: 267 255 stlink_usb.c:1843 stlink_usb_open(): 1200 kHz
Debug: 268 255 stlink_usb.c:1843 stlink_usb_open(): 950 kHz
Debug: 269 255 stlink_usb.c:1843 stlink_usb_open(): 480 kHz
Debug: 270 255 stlink_usb.c:1843 stlink_usb_open(): 240 kHz
Debug: 271 255 stlink_usb.c:1843 stlink_usb_open(): 125 kHz
Debug: 272 255 stlink_usb.c:1843 stlink_usb_open(): 100 kHz
Debug: 273 255 stlink_usb.c:1843 stlink_usb_open(): 50 kHz
Debug: 274 255 stlink_usb.c:1843 stlink_usb_open(): 25 kHz
Debug: 275 256 stlink_usb.c:1843 stlink_usb_open(): 15 kHz
Debug: 276 256 stlink_usb.c:1843 stlink_usb_open(): 5 kHz
Debug: 277 257 stlink_usb.c:1863 stlink_usb_open(): Using TAR autoincrement: 4096
Debug: 278 257 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 279 257 core.c:727 jtag_add_reset(): SRST line asserted
Debug: 280 257 core.c:755 jtag_add_reset(): TRST line released
Debug: 281 257 core.c:329 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 282 259 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
Debug: 283 259 stlink_usb.c:923 stlink_usb_idcode(): IDCODE: 0x1BA01477
Debug: 284 260 openocd.c:150 handle_init_command(): Examining targets...
Debug: 285 260 target.c:1501 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 286 260 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 287 261 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 288 261 cortex_m.c:1930 cortex_m_examine(): Cortex-M3 r1p1 processor detected
Debug: 289 262 cortex_m.c:1931 cortex_m_examine(): cpuid: 0x411fc231
Debug: 290 262 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 291 262 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 292 263 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
Debug: 293 264 target.c:2226 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug: 294 265 target.c:2314 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 295 265 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
Debug: 296 266 target.c:2314 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 297 266 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
Debug: 298 267 target.c:2314 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 299 268 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
Debug: 300 269 target.c:2314 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 301 269 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
Debug: 302 270 target.c:2314 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 303 271 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1
Debug: 304 272 target.c:2314 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 305 272 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1
Debug: 306 273 target.c:2314 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 307 273 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1
Debug: 308 274 target.c:2314 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 309 274 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1
Debug: 310 276 cortex_m.c:2005 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2
Debug: 311 276 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
Debug: 312 277 target.c:2226 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 313 277 target.c:2314 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 314 277 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
Debug: 315 278 target.c:2314 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 316 279 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
Debug: 317 280 target.c:2314 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 318 281 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1
Debug: 319 282 target.c:2314 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 320 282 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1
Debug: 321 284 cortex_m.c:1849 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 322 284 cortex_m.c:2015 cortex_m_examine(): stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 323 284 target.c:1501 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 324 284 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action:
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 325 285 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 326 286 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 327 286 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 329 287 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 330 289 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 331 289 command.c:145 script_debug(): command - ocd_flash ocd_flash init
Debug: 333 290 tcl.c:1097 handle_flash_init_command(): Initializing flash devices...
Debug: 334 290 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 335 290 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 336 290 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 337 290 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 338 290 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 339 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 340 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 341 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 342 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 343 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 344 291 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 345 292 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 346 292 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 347 292 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 348 292 command.c:366 register_command_handler(): registering ‘ocd_flash’...
Debug: 349 292 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 350 293 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 352 293 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
Debug: 353 294 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 354 294 command.c:145 script_debug(): command - ocd_nand ocd_nand init
Debug: 356 294 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 357 294 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 358 295 command.c:145 script_debug(): command - ocd_pld ocd_pld init
Debug: 360 295 pld.c:207 handle_pld_init_command(): Initializing PLDs...
Info : 361 607 server.c:91 add_connection(): accepting ‘gdb’ connection on tcp/3333
Debug: 362 608 breakpoints.c:359 breakpoint_clear_target_internal(): Delete all breakpoints for target: stm32f1x.cpu
Debug: 363 608 breakpoints.c:499 watchpoint_clear_target(): Delete all watchpoints for target: stm32f1x.cpu
Debug: 364 608 target.c:1501 target_call_event_callbacks(): target event 23 (gdb-attach)
Debug: 365 608 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 23 (gdb-attach) action:
# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
reset init
Debug: 366 609 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset init
Debug: 367 609 command.c:145 script_debug(): command - reset ocd_reset init
Debug: 369 610 target.c:1519 target_call_reset_callbacks(): target reset 3 (init)
Debug: 370 610 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 371 611 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 372 611 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-start
Debug: 373 611 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-start
Debug: 374 612 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 375 612 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 376 612 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 377 612 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 378 613 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-start
Debug: 379 613 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-start
Debug: 380 613 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_examine
Debug: 381 613 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_examine
Debug: 382 614 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-end
Debug: 383 614 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-end
Debug: 384 614 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action:
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 385 615 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 386 617 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 387 617 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 389 617 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 390 619 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 391 619 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 392 619 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 393 620 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 394 620 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset assert 1
Debug: 395 620 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset assert 1
Debug: 396 620 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 397 621 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
Debug: 398 623 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 399 624 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 400 624 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 401 624 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 402 625 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 403 625 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 404 625 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 405 626 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 406 626 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 407 626 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
Debug: 408 627 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 409 627 core.c:731 jtag_add_reset(): SRST line released
Debug: 410 627 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 411 627 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 412 628 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 413 628 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 414 629 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 415 629 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 416 630 target.c:2788 target_wait_state(): waiting for target halted...
Error: 418 1631 target.c:2796 target_wait_state(): timed out while waiting for target halted
Debug: 419 1631 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu curstate
Debug: 420 1631 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu curstate
User : 421 1632 command.c:546 command_print(): TARGET: stm32f1x.cpu - Not halted
in procedure ‘reset’
in procedure ‘ocd_bouncer’
Debug: 422 1632 command.c:628 run_command(): Command failed with error code -4
User : 423 1632 command.c:546 command_print():
Debug: 424 1632 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 425 1634 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 426 1634 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042000 4 1
Debug: 427 1636 target.c:2226 target_read_u32(): address: 0xe0042000, value: 0x20036410
Info : 428 1636 stm32f1x.c:868 stm32x_probe(): device id = 0x20036410
Debug: 429 1636 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 430 1637 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 431 1637 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x1ffff7e0 2 1
Debug: 432 1639 target.c:2250 target_read_u16(): address: 0x1ffff7e0, value: 0x0040
Info : 433 1639 stm32f1x.c:996 stm32x_probe(): flash size = 64kbytes
Debug: 434 1639 gdb_server.c:994 gdb_new_connection(): New GDB Connection: 1, Target stm32f1x.cpu, state: running
Debug: 435 1640 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qSupported:multiprocess+;swbreak+;hwbreak+;qRelocInsn+’
Debug: 436 1641 gdb_server.c:2673 gdb_input_inner(): received packet: ‘QStartNoAckMode’
Debug: 437 1641 gdb_server.c:632 gdb_get_packet_inner(): Received first acknowledgment after entering noack mode. Ignoring it.
Debug: 438 1641 gdb_server.c:2673 gdb_input_inner(): received packet: ‘Hg0’
Debug: 439 1641 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qXfer:features:read:target.xml:0,fff’
Debug: 440 1643 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qTStatus’
Debug: 441 1643 gdb_server.c:2673 gdb_input_inner(): received packet: ‘?’
Debug: 442 1643 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qfThreadInfo’
Debug: 443 1644 gdb_server.c:2673 gdb_input_inner(): received packet: ‘Hc-1’
Debug: 444 1644 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qC’
Debug: 445 1644 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qAttached’
Debug: 446 1645 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qOffsets’
Debug: 447 1645 gdb_server.c:2673 gdb_input_inner(): received packet: ‘g’
Debug: 448 1645 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qfThreadInfo’
Debug: 449 1646 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qXfer:memory-map:read::0,fff’
Debug: 450 1646 gdb_server.c:2673 gdb_input_inner(): received packet: ‘m0,4’
Debug: 451 1646 gdb_server.c:1384 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004
Debug: 452 1647 target.c:2078 target_read_buffer(): reading buffer of 4 byte at 0x00000000
Debug: 453 1647 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x00000000 4 1
Debug: 454 1649 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qSymbol::’
Debug: 455 1721 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qfThreadInfo’
Debug: 456 1722 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qRcmd,72657365742068616c74’
Debug: 457 1723 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 458 1723 command.c:145 script_debug(): command - reset ocd_reset halt
Debug: 460 1724 target.c:1519 target_call_reset_callbacks(): target reset 2 (halt)
Debug: 461 1724 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 462 1724 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 463 1724 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-start
Debug: 464 1724 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-start
Debug: 465 1725 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 466 1725 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 467 1725 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 468 1726 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 469 1726 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-start
Debug: 470 1726 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-start
Debug: 471 1726 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_examine
Debug: 472 1727 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_examine
Debug: 473 1727 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-end
Debug: 474 1727 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-end
Debug: 475 1727 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action:
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 476 1728 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 477 1729 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 478 1730 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 480 1730 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 481 1731 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 482 1732 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 483 1732 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 484 1732 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 485 1733 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset assert 1
Debug: 486 1733 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset assert 1
Debug: 487 1733 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 488 1734 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
Debug: 489 1734 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 490 1734 core.c:727 jtag_add_reset(): SRST line asserted
Debug: 491 1737 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 492 1737 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 493 1737 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 494 1737 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 495 1738 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 496 1738 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 497 1739 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 498 1739 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 499 1739 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 500 1739 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
Debug: 501 1740 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 502 1740 core.c:731 jtag_add_reset(): SRST line released
Debug: 503 1741 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 504 1741 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 505 1741 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 506 1742 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 507 1742 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 508 1742 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 509 1743 target.c:2788 target_wait_state(): waiting for target halted...
Error: 511 2744 target.c:2796 target_wait_state(): timed out while waiting for target halted
Debug: 512 2744 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu curstate
Debug: 513 2745 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu curstate
User : 514 2745 command.c:546 command_print(): TARGET: stm32f1x.cpu - Not halted
in procedure ‘reset’
in procedure ‘ocd_bouncer’
Debug: 515 2745 command.c:628 run_command(): Command failed with error code -4
User : 516 2745 command.c:689 command_run_line():
Debug: 517 2746 gdb_server.c:2673 gdb_input_inner(): received packet: ‘qfThreadInfo’
Debug: 518 2747 gdb_server.c:2673 gdb_input_inner(): received packet: ‘vFlashErase:08000000,00001000’
Debug: 519 2748 target.c:1501 target_call_event_callbacks(): target event 25 (gdb-flash-erase-start)
Debug: 520 2748 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 25 (gdb-flash-erase-start) action: reset init
Debug: 521 2748 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset init
Debug: 522 2748 command.c:145 script_debug(): command - reset ocd_reset init
Debug: 524 2749 target.c:1519 target_call_reset_callbacks(): target reset 3 (init)
Debug: 525 2749 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 526 2750 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 527 2750 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-start
Debug: 528 2750 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-start
Debug: 529 2750 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 530 2751 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 531 2751 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 532 2751 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 533 2751 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-start
Debug: 534 2752 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-start
Debug: 535 2752 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_examine
Debug: 536 2752 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_examine
Debug: 537 2752 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event examine-end
Debug: 538 2753 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event examine-end
Debug: 539 2753 target.c:4256 target_handle_event(): target: (0) stm32f1x.cpu (hla_target) event: 22 (examine-end) action:
# Enable debug during low power modes
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
# DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000307 0
Debug: 540 2753 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 541 2755 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 542 2755 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 544 2755 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 545 2757 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 546 2757 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-pre
Debug: 547 2757 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 548 2758 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 549 2758 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset assert 1
Debug: 550 2758 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset assert 1
Debug: 551 2758 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 552 2759 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
Debug: 553 2759 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 554 2759 core.c:727 jtag_add_reset(): SRST line asserted
Debug: 555 2762 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 556 2762 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-assert-post
Debug: 557 2763 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 558 2763 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-pre
Debug: 559 2763 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 560 2763 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 561 2764 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 562 2764 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_reset deassert 1
Debug: 563 2764 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 564 2765 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
Debug: 565 2766 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 566 2766 core.c:731 jtag_add_reset(): SRST line released
Debug: 567 2766 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 568 2766 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu invoke-event reset-deassert-post
Debug: 569 2767 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 570 2767 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 571 2767 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 572 2767 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu arp_waitstate halted 1000
Debug: 573 2768 target.c:2788 target_wait_state(): waiting for target halted...
Error: 575 3769 target.c:2796 target_wait_state(): timed out while waiting for target halted
Debug: 576 3769 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f1x.cpu curstate
Debug: 577 3769 command.c:145 script_debug(): command - ocd_stm32f1x.cpu ocd_stm32f1x.cpu curstate
User : 578 3769 command.c:546 command_print(): TARGET: stm32f1x.cpu - Not halted
in procedure ‘reset’
in procedure ‘ocd_bouncer’
Debug: 579 3769 command.c:628 run_command(): Command failed with error code -4
User : 580 3770 command.c:546 command_print():
Debug: 581 3770 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Error: 582 3770 stm32f1x.c:428 stm32x_erase(): Target not halted
Error: 583 3770 core.c:47 flash_driver_erase(): failed erasing sectors 0 to 3
Debug: 584 3770 target.c:1501 target_call_event_callbacks(): target event 26 (gdb-flash-erase-end)
Error: 585 3770 gdb_server.c:2481 gdb_v_packet(): flash_erase returned -304
Debug: 586 3771 gdb_server.c:2673 gdb_input_inner(): received packet: ‘m0,4’
Debug: 587 3771 gdb_server.c:1384 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004
Debug: 588 3771 target.c:2078 target_read_buffer(): reading buffer of 4 byte at 0x00000000
Debug: 589 3772 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x00000000 4 1