false condition if statement getting executed inside ISR
The simplest way to go, as you measure time between the last interrupt, is to just ignore any interrupt occuring less than x µs after a previous interrupt. Thus the first switch will be taken into account, then all bounce IRQs will be ignored waiting for at least x µs without any interrupt.
If you have ONLY one GPIO generating interrupts on the port where you connect the EXTI interrupt, then you may disable this IRQ in the NVIC, arm a timer for x µs, then re-enable teh EXIT interrupt in the NVIC when the timer expires; that is a bit more complex, but will cost less CPU cycles...
Bernard (Ac6)
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