J-Link and I/O Registers
Hi,
I’m using System Workbench V1.7 on Windows 7 with Segger J-Link. The target is a custom board with STM32F205ZET.
Debugging works fine, but I can’t inspect the I/O register. There is shown the message “No CMSIS-SVD schema for this target”.
The project is based on a makefile (headless build), but I have chosen the toolchain Ac6 STM32 MCU GCC. So I have the possibility to set the target.
I have two debug configurations:
- Ac6 STM32 Debugging
- GDB SEGGER J-Link Debugging
If I start debugging Ac6 configuration at first(it doesn’t work, because Segger J-Link is connected => error message) and then I use the Segger configuration, the inspection of the I/O register works.
Is there the possibility to inspect the I/O register without this workaround?
Or is there a solution for this problem in the future?
Thanks,
Guenter