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Zephyr project on STM32

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CPSID i assembly instruction not supported by Cortex M0

I’m developing code for a Cortex M0 using FreeRTOS and eclipse with the AC6 plugin. At the end of my tasks, I’m using an assert to determine if the watermark of my task is greater than the specified task size. The macro I use for my assert looks like this:

  1. define HMI_DBG_ASSERT(x) if ((x) == 0) {taskDISABLE_INTERRUPTS(); \

HAL_GPIO_WritePin(ASSERT_LED_GPIO_Port, ASSERT_LED_Pin, GPIO_PIN_SET); \
for( ;; );}

My tasks look like this:

for(;;)
{
//some
//code
uxHighWaterMark = uxTaskGetStackHighWaterMark( NULL );
HMI_DBG_ASSERT(uxHighWaterMark >= WDG_STACK_SIZE_WATERMARK_WORD);
}

This compiles and works perfectly! My issue is that I’m working on common code with another developer, and he used a macro that is almost identical to mine:

  1. define CMN_DBG_ASSERT(x) if ((x) == 0) {taskDISABLE_INTERRUPTS(); \

HAL_GPIO_WritePin(ASSERT_LED_GPIO_Port, ASSERT_LED_Pin, GPIO_PIN_SET); \
for( ;; );}

When I call this macro, my compiler returns the following error:

selected processor does not support `cpsid i’ in Thumb mode
the “taskDISABLE_INTERUPTS();” macro is defined by FreeRTOS, and calls the following assembly instruction:

__asm volatile( ” cpsid i ” )

I find it weird that my compiler doesn’t complain with my other macro, but with this one it does. Also, I tried using my HMI_DBG_ASSERT in the .c file where my CMN_DBG_ASSERT is called, and I get the same error. I made sure that my code includes the file correctly and my inclusion path in eclipse is specified.

Cortex-M wiki says that “CPSIE and CPSID also don’t exist because ARM instruction set is missing from Cortex-M. Other CPS instructions still exists in the Cortex-M.”

ARM’s website does have a specification for the CPSIE and CPSID in their documentation for Cortex-M0:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/BABHBAAB.htmlQuestion

In any case, the macro has been called before and it worked fine, it’s just really weird that my compiler is only complaining now. A colleague of mine using IAR Cortex-M edition tried using the macro and it worked fine... I’m starting to think its another strange eclipse problem.

Can anybody shed some light on the issue I’m having?

SOLVED:

Solved. Somehow my folder with the common code had a different build setting than the other folders in my project, and the -mcpu flag was not there. To reset build configuration to default:

Right-click folder -> Resource Configurations -> Reset to Default