[solved] Incorrect idcode on new batch of STM32F030F4P6TR
Hi All,
I have a design that uses STM32F030F4P6TR. Everything was fine until I had to replace one of the MCU’s. The new batch of MCU’s report a different device id, and so SW4STM32 refuses to program them:
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Open On-Chip Debugger 0.10.0-dev-00271-g090f597 (2016-07-11-10:42)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_assert_srst
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v23 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.197369
Warn : UNEXPECTED idcode: 0x2ba01477
Error: expected 1 of 1: 0x0bb11477
in procedure ‘init’
in procedure ‘ocd_bouncer’
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Some googling got me to this page of the openocd source code: http://www.pittnerovi.com/jiri/hobby/electronics/stm32f4/stlink-common.h
Which says:
/* cortex core ids */
// TODO clean this up...
- define STM32VL_CORE_ID 0x1ba01477
- define STM32L_CORE_ID 0x2ba01477
- define STM32F3_CORE_ID 0x2ba01477
- define STM32F4_CORE_ID 0x2ba01477
- define STM32F0_CORE_ID 0xbb11477
- define CORE_M3_R1 0x1BA00477
- define CORE_M3_R2 0x4BA00477
- define CORE_M4_R0 0x2BA01477
It looks like my STM32F0 chips are reporting the STM32L core ID. Does any one know why? How can I force OpenOCD to go ahead and program them from SW4STM32?
Thanks.
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