generating position independent code problem on STM32F4
Hi guys,
This question isn’t about system workbench specifically, but about getting gcc to generate position independent code on an stm32f4 platform.
My build line is this:
“arm-none-eabi-gcc -O -std=c99 -mthumb -mcpu=cortex-m4 -fpic -msingle-pic-base -mfloat-abi=hard -mfpu=fpv4-sp-d16 -specs=nano.specs -specs=nosys.specs -c pic.c”
The problem appears to be that while the generated code makes use of the r9-based GOT section, it still generates standard non-PIC references to function calls. And when I do the link phase (with the “-pie” flag) there’s also no relocation data in the resulting ELF file.
Am I grossly misunderstanding the way this is supposed to be working, or just doing something wrong?
The C code and resulting generated code is below.
Many thanks,
-Imre Magyar
---------------
C code:
int glob = 100;
int func(int b)
{
extern int EXT;
return b + EXT + 7;
}
int ml_func(int a, int b)
{
return glob + func(a + b);
}
Generated code:
Disassembly of section .text:
00000000 :
0: 4b03 ldr r3, pc, #12 ; (10 )
2: f859 3003 ldr.w r3, r9, r3
6: 681b ldr r3, r3, #0
8: 4418 add r0, r3
a: 3007 adds r0, #7
c: 4770 bx lr
e: bf00 nop
10: 00000000 .word 0x00000000
00000014 :
14: b508 push {r3, lr}
16: 4408 add r0, r1
18: f7ff fffe bl 0
1c: 4b02 ldr r3, pc, #8 ; (28 )
1e: f859 3003 ldr.w r3, r9, r3
22: 681b ldr r3, r3, #0
24: 4418 add r0, r3
26: bd08 pop {r3, pc}
28: 00000000 .word 0x00000000