Slowing DMA rate for SPI 2 transfers
I noticed that when HCLK on my 32F406VG Discovery board is reduced to 84 MHz in MX the SPI 2 link to the LCD ILI9341 works.
At 168 MHz it fails and the SPI prescaler doesn’t fix the issue.
There is no separate DMA click divider, so I’m forced to slow the CPU down, tried reducing APB clocks by no change. :/
Any advice please? I’m probably missing something...