Breakpoints in SRAM and external Flash
I have two related questions about breakpoints. I am using a STM32H750 and am running code from both internal D2 SRAM and external QSPI Flash.
When running from SRAM, breakpoints will work if caching is disabled, but once enabled, the processor will get stuck once it hits the breakpoint. I can get around this by manually setting the breakpoint to a hardware breakpoint. I assume by default it is using software breakpoints in SRAM, but the cache does not get updated when the breakpoint is removed, and thus it cannot advance past the breakpoint. So is there some way to change the debugger to either manage the cache when using soft breakpoints or to force hard breakpoints when executing in SRAM?
When running from QSPI flash, it seems that if you try to set a breakpoint, it is defaulting to soft breakpoints, as it fails to set it. Again, if you manually change the breakpoint to a hard breakpoint, then it will work. So is there some way to force the debugger to always use hard breakpoints when running from QSPI flash?
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