System Workbench for STM32

Posted by nixie_tube on 2019-08-20 16:10

I’m programing in c++ and I’m trying to set a gpio pin to 0 but when I write 1 in brr register it doesn’t clear the corresponding bit in odr register
but it works when I use the bits 31:16 of bsrr register. RM0038 said that brr is available for cat.3 cat.4 cat.5 cat.6 and stm32l152rct6 is cat.3
Why brr register doesn’t do any thing?

RM0038:


https://www.st.com/content/ccc/resource/technical/document/reference_manual/cc/f9/93/b2/f0/82/42/57/CD00240193.pdf/files/CD00240193.pdf/jcr:content/translations/en.CD00240193.pdf
source code:

#include <cstdint> //for definition of uint_32t equivalent of stdint.h in c

typedef struct gpio_struct  //GPIO structure
{
    volatile uint32_t moder;   //GPIO port mode register
    volatile uint32_t otyper;  //GPIO port output type register
    volatile uint32_t ospeedr; //GPIO port output speed register
    volatile uint32_t pupdr;   //GPIO port pull-up/pull-down register
    volatile uint32_t idr;     //GPIO port input data register
    volatile uint32_t odr;     //GPIO port output data register
    volatile uint32_t bsrr;    //GPIO port bit set/reset register
    volatile uint32_t lckr;    //GPIO port configuration lock register
    volatile uint32_t afr[2];  //GPIO alternate function register
    volatile uint32_t brr;     //GPIO bit reset register
} gpio_struct;

gpio_struct &gpio_a_register = *(gpio_struct *) 0x40020000UL;
gpio_struct &gpio_b_register = *(gpio_struct *) (0x40020000UL + 0x00000400UL);
gpio_struct &gpio_c_register = *(gpio_struct *) (0x40020000UL + 0x00000800UL);
gpio_struct &gpio_d_register = *(gpio_struct *) (0x40020000UL + 0x00000C00UL);
gpio_struct &gpio_e_register = *(gpio_struct *) (0x40020000UL + 0x00001000UL);
gpio_struct &gpio_h_register = *(gpio_struct *) (0x40020000UL + 0x00001400UL);

typedef struct rcc_struct
{
    volatile uint32_t cr;        //clock control register
    volatile uint32_t icscr;     //Internal clock sources calibration register
    volatile uint32_t cfgr;      //Clock configuration register
    volatile uint32_t cir;       //Clock interrupt register
    volatile uint32_t ahbrstr;   //AHB peripheral reset register
    volatile uint32_t ahb2rstr;  //APB2 peripheral reset register
    volatile uint32_t apb1rstr;  //APB1 peripheral reset register
    volatile uint32_t ahbenr;    //AHB peripheral clock enable register
    volatile uint32_t apb2enr;   //APB2 peripheral clock enable register
    volatile uint32_t apb1enr;   //APB1 peripheral clock enable register
    volatile uint32_t ahblpenr;  //AHB peripheral clock enable in low-power mode register
    volatile uint32_t apb2lpenr; //APB2 peripheral clock enable in low-power mode register
    volatile uint32_t apb1lpenr; //APB1 peripheral clock enable in low-power mode register
    volatile uint32_t csr;       //Control/status register
} rcc_struct;

rcc_struct &rcc_reg = *(rcc_struct *)(0x40023800);

int main(void)
{
    rcc_reg.ahbenr |= 0b10; //enable clock for gpio_b
    rcc_reg.ahblpenr |= 0b10; //enable clock for gpio_b in low power mode
    gpio_b_register.moder |= 0b01UL << 12; // set pin6 as output
    gpio_b_register.bsrr |= 1UL << 6; //set pin6 to 1
    while(1)
    {
        // next line as no effect
        gpio_b_register.brr |= 1UL << 6; //set pin6 to 0
        //but next line work
        //gpio_b_register.bsrr |= (1UL << 6) << 16;
    }
}

#include <cstdint> //for definition of uint_32t equivalent of stdint.h in c

​

typedef struct gpio_struct  //GPIO structure

{

    volatile uint32_t moder;   //GPIO port mode register

    volatile uint32_t otyper;  //GPIO port output type register

    volatile uint32_t ospeedr; //GPIO port output speed register

    volatile uint32_t pupdr;   //GPIO port pull-up/pull-down register

    volatile uint32_t idr;     //GPIO port input data register

    volatile uint32_t odr;     //GPIO port output data register

    volatile uint32_t bsrr;    //GPIO port bit set/reset register

    volatile uint32_t lckr;    //GPIO port configuration lock register

    volatile uint32_t afr[2];  //GPIO alternate function register

    volatile uint32_t brr;     //GPIO bit reset register

} gpio_struct;

​

gpio_struct &gpio_a_register = *(gpio_struct *) 0x40020000UL;

gpio_struct &gpio_b_register = *(gpio_struct *) (0x40020000UL + 0x00000400UL);

gpio_struct &gpio_c_register = *(gpio_struct *) (0x40020000UL + 0x00000800UL);

gpio_struct &gpio_d_register = *(gpio_struct *) (0x40020000UL + 0x00000C00UL);

gpio_struct &gpio_e_register = *(gpio_struct *) (0x40020000UL + 0x00001000UL);

gpio_struct &gpio_h_register = *(gpio_struct *) (0x40020000UL + 0x00001400UL);

​

typedef struct rcc_struct

{

    volatile uint32_t cr;        //clock control register

    volatile uint32_t icscr;     //Internal clock sources calibration register

    volatile uint32_t cfgr;      //Clock configuration register

    volatile uint32_t cir;       //Clock interrupt register

    volatile uint32_t ahbrstr;   //AHB peripheral reset register

    volatile uint32_t ahb2rstr;  //APB2 peripheral reset register

    volatile uint32_t apb1rstr;  //APB1 peripheral reset register

    volatile uint32_t ahbenr;    //AHB peripheral clock enable register

    volatile uint32_t apb2enr;   //APB2 peripheral clock enable register

    volatile uint32_t apb1enr;   //APB1 peripheral clock enable register

    volatile uint32_t ahblpenr;  //AHB peripheral clock enable in low-power mode register

    volatile uint32_t apb2lpenr; //APB2 peripheral clock enable in low-power mode register

    volatile uint32_t apb1lpenr; //APB1 peripheral clock enable in low-power mode register

    volatile uint32_t csr;       //Control/status register

} rcc_struct;

​

rcc_struct &rcc_reg = *(rcc_struct *)(0x40023800);

​

int main(void)

{

    rcc_reg.ahbenr |= 0b10; //enable clock for gpio_b

    rcc_reg.ahblpenr |= 0b10; //enable clock for gpio_b in low power mode

    gpio_b_register.moder |= 0b01UL << 12; // set pin6 as output

    gpio_b_register.bsrr |= 1UL << 6; //set pin6 to 1

    while(1)

    {

        // next line as no effect

        gpio_b_register.brr |= 1UL << 6; //set pin6 to 0

        //but next line work

        //gpio_b_register.bsrr |= (1UL << 6) << 16;

    }

}