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SW4STM32 and SW4Linux fully supports the STM32MP1 asymmetric multicore Cortex/A7+M4 MPUs

   With System Workbench for Linux, Embedded Linux on the STM32MP1 family of MPUs from ST was never as simple to build and maintain, even for newcomers in the Linux world. And, if you install System Workbench for Linux in System Workbench for STM32 you can seamlessly develop and debug asymmetric applications running partly on Linux, partly on the Cortex-M4.
You can get more information from the ac6-tools website and download (registration required) various documents highlighting:

System Workbench for STM32

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You are viewing a reply to Flash write failed when connecting to STM32H753IIK  

Flash write failed when connecting to STM32H753IIK

Posted by ayoko309 on 2019-02-15 09:44

Noticed one difference.

The device successfully flashed is “Device ID Y” (found on Nucleo).
The device not-successfully flashed is, “Device ID X” (new revision).

Refer “STM32H750xB and STM32H753xI Errata sheet (ES0396 Rev 4)”.
I suspect that we may need different flash writing procedure between the two device revisions...

Regards,
Atsushi

Reads: 1795
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Posted by LaurentL on 2019-02-15 10:18

Hello,

Indeed, H7xx rev X needs an update for flash writing, a new version will be available soon to correct this.

Rgds,
Laurent

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Posted by ayoko309 on 2019-02-16 00:55

Hi Laurent,

Thank you for your reply! Before reading the reply, I think I found a possible solution.

In OpenOCD source code src/flash/nor/stm32h7x.c, I added the following line.

target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_PG);

just prior calling “target_run_flash_async_algorithm()”.

By the change, the problem looks resolved.

I’m not sure if this is the case and why revision Y doesn’t complain about PG bit.

Once again, thank you for your attention.

Regards,
Atsushi

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Posted by ayoko309 on 2019-02-16 01:19

I found assembly code stm32h7x.S is actually setting PG bit as following.

define STM32_CR_PROG 0x00000032 /* PSIZE64 | PG */
// ...
mov r6, #STM32_CR_PROG
str r6, r4, #STM32_FLASH_CR_OFFSET

I’m confused.

I’m waiting for an analysis by specialists.

Regards,
Atsushi

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Posted by LaurentL on 2019-02-25 14:20

Hello,

The issue was not with the PG bit but more with the QW bit when polling the programming status.
You can try the latest version SW4STM32 V2.8.0.
It includes the correction and should work now on all H7 revisions.

Rgds,
Laurent

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Posted by ayoko309 on 2019-02-26 00:33

Hi Laurent,

Thank you for the update. I will try the latest version ASAP.

Regards,
Atsushi

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Posted by ayoko309 on 2019-03-04 12:23

Hi Laurent,

Confirmed that SW4STM32 v2.8 (Windows version) could flash rev X of STM32H753. Thank you for your support!

Regards,
Atsushi

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