Loading...
 

SW4STM32 and SW4Linux fully supports the STM32MP1 asymmetric multicore Cortex/A7+M4 MPUs

   With System Workbench for Linux, Embedded Linux on the STM32MP1 family of MPUs from ST was never as simple to build and maintain, even for newcomers in the Linux world.
And, if you install System Workbench for Linux in System Workbench for STM32 you can seamlessly develop and debug asymmetric applications running partly on Linux, partly on the Cortex-M4.
You can get more information from the ac6-tools website and download two short videos (registration required) highlighting:

System Workbench for STM32


Need help with RTC from LSE and exit from stop mode when SLEEPDEEP bit set

//
void rtc_isr(void){
bitclr(GPIOA->ODR,GPIO_ODR_ODR3); //led off
bitclr(RTC->CRL,RTC_CRL_ALRF);
bitset(EXTI->PR,EXTI_LINE_RTCALARM);
}

//use HSI default
int main(void) {

// led
//PORTA
bitset(RCC->APB2ENR,RCC_APB2ENR_IOPAEN);
//GPIOA3 push-pull 10Mhz
GPIOA->CRL= (GPIOA->CRL&(~(GPIO_CRL_CNF3_1 | GPIO_CRL_CNF3_0 |GPIO_CRL_MODE3_1))) |
(GPIO_CRL_MODE3_0);
bitset(GPIOA->ODR,GPIO_ODR_ODR3); //led on

// rtc init
RCC->APB1ENR|=(RCC_APB1ENR_BKPEN|RCC_APB1ENR_PWREN);
bitset(PWR->CR,PWR_CR_DBP);

//Enable the LSE clock
bitset(RCC->BDCR,RCC_BDCR_LSEON);
while ((RCC->BDCR&RCC_BDCR_LSERDY) == 0);

//Select LSE as the RTC clock source
if (((RCC->BDCR)&0x300)!=0x100) {
bitset(RCC->BDCR,RCC_BDCR_BDRST);
bitclr(RCC->BDCR,RCC_BDCR_BDRST);
bitset(RCC->BDCR,0x100);
}

while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
bitset(RTC->CRL,RTC_CRL_CNF);

//Set the RTC prescaler value
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->PRLL=0x7fff;
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->PRLH=0x0;

//clear alarm
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->ALRH=0;
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->ALRL=0;


bitclr(RTC->CRL,RTC_CRL_CNF);
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);

//Enable RTC
bitset(RCC->BDCR,RCC_BDCR_RTCEN);





// rtc alarm init
bitset(EXTI->PR,EXTI_LINE_RTCALARM);
//not masked
bitset(EXTI->IMR,EXTI_LINE_RTCALARM);
//masked
bitclr(EXTI->EMR,EXTI_LINE_RTCALARM);
//rising trigger enabled
bitset(EXTI->RTSR,EXTI_LINE_RTCALARM);
//falling trigger disabled
bitclr(EXTI->FTSR,EXTI_LINE_RTCALARM);


// Enable RTC interrupts
NVIC_SetPriority(RTC_IRQn, 0);
NVIC_EnableIRQ(RTC_IRQn);



//set alarm curtime + 2 sec
uint32_t alarmcnt=(RTC->CNTHCRL&RTC_CRL_RTOFF) == 0);
bitset(RTC->CRL,RTC_CRL_CNF);

bitclr(RTC->CRH,RTC_CRH_ALRIE);
bitclr(RTC->CRL,RTC_CRL_ALRF);

while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->ALRH=alarmcnt>>16;
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);
RTC->ALRL=alarmcnt&0xFFFF;

bitset(RTC->CRH,RTC_CRH_ALRIE);
bitclr(RTC->CRL,RTC_CRL_CNF);
while ((RTC->CRL&RTC_CRL_RTOFF) == 0);

// stop
PWR->CR = (PWR->CR & (~ (PWR_CR_PDDS | PWR_CR_LPDS))) | PWR_CR_CWUF;
SCB->SCR=(SCB->SCR & (~(SCB_SCR_SLEEPONEXIT_Msk | SCB_SCR_SEVONPEND_Msk))) | SCB_SCR_SLEEPDEEP_Msk;
__WFI();

 

Newest Forum Posts

  1. Building project - subdir.mk error by nupurkohadkar1997, 2019-12-06 18:10
  2. openOCD Wrong device detected by maxim221, 2019-12-06 12:32
  3. STM32429I_Discovery board with printf float support problem by johannes.visser@msc-technologies.eu, 2019-12-05 16:08
  4. malloc heap issue with CubeMX Project by johannes.visser@msc-technologies.eu, 2019-12-05 16:04
  5. Debugger not working by Daniel Jack Morley, 2019-11-27 21:46
  6. Compiler change problem by Lucian Pop, 2019-11-20 17:41
  7. Sample programs and compiling by jjtimer, 2019-11-20 10:31
  8. Unit test issues for STM32 by Rinkedevries, 2019-11-18 10:32
  9. Ubuntu 19.04 Debug problems by costantino, 2019-11-17 19:17
  10. Compile without eclipse by JSStabl, 2019-11-14 15:55

Last-Modified Blogs