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Zephyr project on STM32

   Zephyr Workbench, a VSCode extension to manage Zephyr on STM32.
It enables users to easily create, develop, and debug Zephyr applications.
Main features:
  • Install host dependencies.
  • Import toolchain and SDK.
  • Create, configure, build and manage apps.
  • Debug STM32.
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Dual processor simultaneous debug setup?

Posted by tidem on 2018-10-04 13:30

Hi All,

I have two STM32F030R8 on the same board with the IC’s talking to each other via SPI, they are synchronised at each transaction so the problem arises that if I halt one of the IC’s to look at variable states etc the other runs on freely becoming de-synchronised from the halted processor.

each processor is running a slightly altered build of the same code out of the same project.

Is there a way to debug both processors at the same time, or to cause the other processor to halt when the processor in debug halts?

I have 2 x ST-link/V2 connected each processor via SWD.

Thanks for your help,

Tim

Reads: 4684
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Posted by bluenow on 2018-10-05 02:20

This sounds neither an SW4STM32 question nor OpenOCD debug question.
First the question is, how did you configure the SPI on tow side? One is Master and other is Slave? In that case,
the Master drive the SPI’s clock, so you should pause the microcontroller on Master side first and then the Slave site.

Link
Posted by tidem on 2018-10-08 10:11

Hi bluenow,
I managed to launch two debug sessions one for each processor by changing the openOCD port number for the second processor and choosing the correct ST-link device.
Yes they are master slave configuration, there is a lot of data being sent - if I pause the master then pause the slave there is a relatively large amount of time between each processor halting as I can only move so fast - I’m hoping there is a way to halt both debug sessions with one click essentially. Any ideas?
Thanks

Link
Posted by bluenow on 2018-10-08 17:38
I don’t know why you have to pause the controller “simultaneously” ? As I had mentioned early, if you pause the controller on SPI Master side first, will SPI clock stop? If so, no data passing through SPI and it is safe to pause controller on Slave side after then.
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