(Sorry if this is the wrong forum. The ST community is down for a few days and I really need help on this)
I’m working on the ADC and DAC on my f413zh board.
My goal is to send a signal trough the ADC with DMA, process the signal with a FIR filter from cmsis (lowpass) and send it out trough the DAC again for measuring.
So far I’ve managed to do this and the FIR is working correctly. However I have troubles with the output signal as soon as the input signal exceeds 1Khz.
The output on the DAC become more and more “blocky” as I increase the frequenzy on the input and above 1Khz it becomes too unreadable, see the attached images.
Im probably missing something obvious somewhere but I cant figure out what to do? I guess this has something to do with sampling/clock speed?