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System Workbench for STM32


Error: Whole bank access must start at beginning of bank.

Hi,

I am trying to create a new project for a Nucleo Board STM32L476RG. I think I am able to update binaries properly. However, I see the next message when doing so:

----------------------------------------------
Open On-Chip Debugger 0.10.0-dev-00007-g58350bc-dirty (2018-01-12-12:14)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Warn : Could not determine executable path, using configured BINDIR.
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
padded zone erase set to 1
adapter_nsrst_delay: 100
adapter speed: 480 kHz
Info : clock speed 480 kHz
Info : STLINK v2.1 JTAG v30 API v2 M20 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.245580
Info : Stlink adapter speed set to 480 kHz
Info : STM32L476RGTx.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Stlink adapter speed set to 480 kHz
adapter speed: 480 kHz
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800c338 msp: 0x20018000
Info : Stlink adapter speed set to 4000 kHz
adapter speed: 4000 kHz

    • Programming Started **

auto erase enabled
Info : Device id = 0x10076415
Info : STM32L4xx flash size is 1024kb, base address is 0x8000000
Info : Erase the padded zone before the write
Error: Whole bank access must start at beginning of bank.
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x20000050 msp: 0x20018000
Warn : block write succeeded
wrote 223232 bytes from file Debug/project.elf in 5.443383s (40.049 KiB/s)

    • Programming Finished **
    • Verify Started **

target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20018000
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20018000
verified 222292 bytes in 6.380371s (34.023 KiB/s)

    • Verified OK **
    • Resetting Target **

Info : Stlink adapter speed set to 480 kHz
adapter speed: 480 kHz
shutdown command invoked
----------------------------------------------


Can anybody explain this to me, please?
Regards!!

First you can take a look in your LinkerScript to see where you specify the memory aeras !

I think I’ve got the same problem, but since this is my first time ever with a STM32 I don’t know what to look at in LinkerScript (I’m experienced with Arduino, but working with STM32 is totaly different).

My linker script (STM32L4R9AIIx_FLASH.ld) looks as follows:
But first the result I got when running any samples from the STM32Cube_FW_L4_V1.13.0 firmware in System Workbench for STM32 on a Macbook.

Open On-Chip Debugger 0.10.0-dev-00011-g46c94c8 (2018-09-06-08:44)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
padded zone erase set to 1
adapter_nsrst_delay: 100
adapter speed: 480 kHz
Info : clock speed 480 kHz
Info : STLINK v2.1 JTAG v31 API v2 M21 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.219435
Info : Stlink adapter speed set to 480 kHz
Info : STM32L4R9AIIx.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Stlink adapter speed set to 480 kHz
adapter speed: 480 kHz
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x08000200 msp: 0x20030000
Info : Stlink adapter speed set to 4000 kHz
adapter speed: 4000 kHz

    • Programming Started **

auto erase enabled
Info : Device id = 0x10036470
Info : STM32L4xx flash size is 2048kb, base address is 0x8000000
Info : Erase the padded zone before the write
Error: Whole bank access must start at beginning of bank.
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x20000050 msp: 0x20030000
Warn : block write succeeded
wrote 28672 bytes from file Debug/STM32L4R9I-Discovery.elf in 0.676227s (41.406 KiB/s)

    • Programming Finished **
    • Verify Started **

target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20030000
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20030000
verified 27768 bytes in 0.851875s (31.832 KiB/s)

    • Verified OK **
    • Resetting Target **

Info : Stlink adapter speed set to 480 kHz
adapter speed: 480 kHz
shutdown command invoked
==========


/*
*****************************************************************************

    • File  : LinkerScript.ld
    • Abstract  : Linker script for STM32L4R9AIIx Device with
    • 2048KByte FLASH, 640KByte RAM
    • Set heap size, stack size and stack location according
    • to application requirements.
    • Set memory bank area and size if external memory is used.
    • Target  : STMicroelectronics STM32
    • Distribution: The file is distributed as is, without any warranty
    • of any kind.
    • (c)Copyright Ac6.
    • You may use this file as-is or modify it according to the needs of your
    • project. Distribution of this file (unmodified or modified) is not
    • permitted. Ac6 permit registered System Workbench for MCU users the
    • rights to distribute the assembled, compiled & linked contents of this
    • file as part of an application binary file, provided that it is built
    • using the System Workbench for MCU toolchain.

*****************************************************************************

  • /


/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = 0x20030000; /* end of RAM */
/* Generate a link error if heap and stack don’t fit into RAM */
_Min_Heap_Size = 0x400; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Specify the memory areas */
MEMORY
{
RAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 640K
FLASH (rx)  : ORIGIN = 0x8000000, LENGTH = 2048K
}

/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(8);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(8);
} >FLASH

/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(8);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(8);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data goes into FLASH */
.rodata :
{
. = ALIGN(8);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(8);
} >FLASH

.ARM.extab  :
{
. = ALIGN(8);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(8);
} >FLASH
.ARM : {
. = ALIGN(8);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(8);
} >FLASH

.preinit_array  :
{
. = ALIGN(8);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
} >FLASH

.init_array :
{
. = ALIGN(8);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
} >FLASH
.fini_array :
{
. = ALIGN(8);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(8);
} >FLASH

/* used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(8);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */

. = ALIGN(8);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH


/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
bss_start = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
bss_end = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM



/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}


I have exactly the same problem... Did you managed to solve it? It would be very useful for me to know how.

Thanks in advance for your help!