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    • Stop a higher-priority ISR on an STM32F105

    Posted by hardwareguyvw on 2017-11-29 10:18

    Hi,

    Too much code to understand what your problem is.

    "Currently, if IRQHigh is triggered during the IRQLow ISR, the program flow waits until I clear the IRQLow ITPending bit before it branches into the IRQHigh ISR."

    I don't think the priority is the right way round. IRQHigh should prempt immediately even when in IRQLow.

    If you are using Freertos, do keep in mind that the priority (0>N, N>0) for ARM is "the other way around" that most people would expect.

    PRIO 0 is HIGHER priority that PRIO 5 for ARM

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