STM32L011K4 TIM2 Interrupt Latency on Rising/Falling Edge
Hi all,
I’m currently working on STM32L011K4 with TIM2 Input Capture functionality.
I’m using TIM2 to decode a Manchester signal coming from outside stage.
To decode it i’m enabling Input Capture interrupt on both edges.
But when I measure timing I’ve notice that:
- Rising edge interrupt has been issued in 2 us
- Falling edge interrupt has been issued in 45 us
I don’t know why there is this difference?
This difference cause decoding algorithm to fail.
System is running at 32 MHz, with latency set to 1, prefetch and pre-read enabled.
No other interrupt sources have been enabled a part of SysTick interrupt every 1 ms with no code execution (ISR routine is empty).
What I’m doing wrong?
What could be the cause of this problem?
If anyone can help, it will be very appreciated
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