Single Stepping with STM32F7
It looks like it is not a "problem" with the M7 core, but rather a different way that the core handles pending interrupts compared to other Mx cores. I would assume that all debuggers will need to support this if they want to claim support for the F7 core.
Saying this is a core bug is like saying the F7 superscalar execution and cache support are bugs as well since they behave differently than previous core implemetations.
Is there any plan tp fix this in the GDB debugger? Debugging F7 code is painful without it!