Loading...
 

SW4STM32 and SW4Linux fully supports the STM32MP1 asymmetric multicore Cortex/A7+M4 MPUs

   With System Workbench for Linux, Embedded Linux on the STM32MP1 family of MPUs from ST was never as simple to build and maintain, even for newcomers in the Linux world. And, if you install System Workbench for Linux in System Workbench for STM32 you can seamlessly develop and debug asymmetric applications running partly on Linux, partly on the Cortex-M4.
You can get more information from the ac6-tools website and download (registration required) various documents highlighting:

System Workbench for STM32


lptimer in timeout mode - interrupt

Hi ST world,

I’m working on NUCLEO-L053R8 on windows xp with an updated gcc framework on eclipse luna.

I have some unexpected behavior using the LPTIM in interrupt modeon match compare - continuous running mode:

here is my initialization function:

int lpt_init(void)
{
int ret;

// Enable LPTIM1 clock
__LPTIM1_CLK_ENABLE();

RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
RCC_PeriphCLKInitStruct.LptimClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
ret = HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);

if(ret == HAL_OK)
{

LptimHandle.Instance = LPTIM1;

LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;

ret = HAL_LPTIM_Init(&LptimHandle);

/* Initialize LPTIM peripheral according to the passed parameters */
if (ret == HAL_OK)
{
// Configure LPTIM interrupt
HAL_NVIC_SetPriority(LPTIM1_IRQn, /*OS_IT_PRIO_SEC_TIMER*/6, 0);
HAL_NVIC_EnableIRQ(LPTIM1_IRQn);

ret = HAL_LPTIM_TimeOut_Start_IT(&LptimHandle, 16,0); // LPTIM_PERIOD, LPTIM_TIMEOUT);
if (ret != HAL_OK)
{
//
}
}
}

return ret;
}


// Clock config init
static int SystemClock_Config(void)
{
int ret;

// RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;

/* Enable Power Control clock */
__PWR_CLK_ENABLE();

/* The voltage scaling allows optimizing the power consumption when the device is
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);

/* Enable MSI Oscillator */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
RCC_OscInitStruct.MSICalibrationValue=0x00;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;

if((ret = HAL_RCC_OscConfig(&RCC_OscInitStruct))!= HAL_OK)
{
/* Initialization Error */
// Error_Handler();
}
else
{
/* Start LSI for security management */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;


if((ret = HAL_RCC_OscConfig(&RCC_OscInitStruct)) != HAL_OK)
{
/* Initialization Error */
// Error_Handler();
}
}

return ret;
}


// Interrupt handler
void LPTIM1_IRQHandler(void)
{
HAL_LPTIM_IRQHandler(&LptimHandle);
HAL_NVIC_ClearPendingIRQ(LPTIM1_IRQn);
}

Main runs an infinite while(1) loop


This configuration makes the program going to “LPTIM1_IRQHandler” ISR each 16 LPTIMER clock cycle which is the expected behavior when I set a breakpoint at the end of the ISR (after call to HAL_NVIC_ClearPendingIRQ).

Nevertheless if I set the breakpoint before call to HAL_NVIC_ClearPendingIRQ in ISR, program will only jump to ISR twice before never jumping again.

Breakpoint positionning should not interfere in interrupt behavior, should’t it ?
Or maybe I missed something in my configuration?


I also can’t set bit CNTSTRT in LPTIM->CR register (it goes back to 0) but timer is continuously running as expected and all is as if it was set. Could it be a bug here ?

Hope this helps,
thanks and regards,
Sylvain

I seemingly have some conflict with the freertos initialization (freertos was not running when I did my post)
Timer is working fine without these intiialiazations ... I will investigate this.

Thanks,
regards,
Sylvain