STM32L476G-EVAL and ST-LINK/V2 Connection Problem
Hello Laurent:
Attached is a copy of the custom cfg file contents:
- This is an .custom board with a single STM32L476ZGTx chip.
- Generated by System Workbench for STM32
source find interface/stlink-v2.cfg
set WORKAREASIZE 0x18000
transport select "hla_swd"
source find target/stm32l4.cfg
- use hardware reset, connect under reset
reset_config srst_only srst_nogate
I am running from the external +5V and I believe the hardware (eval board and external ST-LINK) should be fine as I can query and erase memory from the U-LINK application.
I am wanting to use an external ST-LINK/V2 because I have a custom board coming and will need to debug from this device. I won't have an on-board ST-LINK hardware.
I tried performing the Target->Erase Chip and get the following error:
Open On-Chip Debugger 0.10.0-dev-00267-g884c33c (2016-03-16-12:22)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Warn : use 'STM32L476.cpu' as target identifier, not '0'
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_assert_srst
adapter speed: 1800 kHz
Info : clock speed 1800 kHz
Error: open failed
in procedure 'init'
in procedure 'ocd_bouncer
Sorry for all the problems, but your help is much appreciated.
Loren