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SW4STM32 and SW4Linux fully supports the STM32MP1 asymmetric multicore Cortex/A7+M4 MPUs

   With System Workbench for Linux, Embedded Linux on the STM32MP1 family of MPUs from ST was never as simple to build and maintain, even for newcomers in the Linux world. And, if you install System Workbench for Linux in System Workbench for STM32 you can seamlessly develop and debug asymmetric applications running partly on Linux, partly on the Cortex-M4.
You can get more information from the ac6-tools website and download (registration required) various documents highlighting:

System Workbench for STM32


Openocd does not work as expected

Hi

I have solved the problem by copying the file target/stm32f1x.cf from the foreign installation of Openocd to the scripts directory of the ac6 openocd plugin path.

Diff is as follows

db@zweistein:~/.p2/pool/plugins/fr.ac6.mcu.debug_1.7.0.201602121829/resources/openocd/scripts> diff -u target/stm32f1x-back.cfg target/stm32f1x.cfg
--- target/stm32f1x-back.cfg    2016-03-03 14:35:11.841740803 +0100
+++ target/stm32f1x.cfg 2016-03-03 14:35:53.041409345 +0100
@@ -87,9 +87,7 @@
  jtag_ntrst_delay 100
 }
 
-# use hardware reset, connect under reset
-# connect_assert_srst needed if low power mode application running (WFI...)
-reset_config srst_only srst_nogate connect_assert_srst
+reset_config srst_nogate
 
 if {![using_hla]} {
     # if srst is not fitted use SYSRESETREQ to
@@ -98,19 +96,11 @@
 }
 
 $_TARGETNAME configure -event examine-end {
-       # Enable debug during low power modes
-       # Stop watchdog counters during halt
        # DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |
        #              DBG_STANDBY | DBG_STOP | DBG_SLEEP
        mmw 0xE0042004 0x00000307 0
 }
 
-$_TARGETNAME configure -event gdb-attach {
-       # Needed to be able to use the connect_assert_srst in reset_config
-       # otherwise, wrong value when reading device flash size register
-       reset init
-}
-
 $_TARGETNAME configure -event trace-config {
        # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
        # change this value accordingly to configure trace pins


Versions of Openocd, the first is from gnuarmeclipse-openocd-debian64-0.9.0-201505190955.tgz https://github.com/gnuarmeclipse/openocd/releasesQuestion

db@zweistein:~> /opt/gnuarmeclipse/openocd/0.9.0-201505190955/bin/openocd --version
GNU ARM Eclipse 64-bits Open On-Chip Debugger 0.9.0-00073-gdd34716-dirty (2015-05-19-09:57)

db@zweistein:~> /home/db/.p2/pool/plugins/fr.ac6.mcu.externaltools.openocd.linux64_1.7.0.201602121841/tools/openocd/bin/openocd --version
Open On-Chip Debugger 0.9.0-dev-dirty (2015-11-13-11:40)


After solving this problem I found out that some of the devices which I have bought were protected.
How can one handle this in “STM32 Workbench”?

A telnet session to openocd was the solution for me:

Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reset halt
target state: halted
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0xfffffffe msp: 0xfffffffc
> flash probe 0
device id = 0x20036410
STM32 flash size failed, probe inaccurate - assuming 128k flash
flash size = 128kbytes
flash 'stm32f1x' found at 0x08000000
> flash protect 0 0 127 off
Device Security Bit Set
target state: halted
target halted due to breakpoint, current mode: Thread 
xPSR: 0x61000000 pc: 0x2000003a msp: 0xfffffffc
cleared protection for sectors 0 through 127 on flash bank 0


Have a nice day
Dieter