SW4STM32 and SW4Linux fully supports the STM32MP1 asymmetric multicore Cortex/A7+M4 MPUs

   With System Workbench for Linux, Embedded Linux on the STM32MP1 family of MPUs from ST was never as simple to build and maintain, even for newcomers in the Linux world. And, if you install System Workbench for Linux in System Workbench for STM32 you can seamlessly develop and debug asymmetric applications running partly on Linux, partly on the Cortex-M4.
You can get more information from the ac6-tools website and download (registration required) various documents highlighting:

System Workbench for STM32

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The naked Attribute



On Cortex-M based processors the “naked” attribute should not be used for ISRs; the processor itself does what is needed so that a normal function can be used as an interrupt handler. The prototype should be:
void ''ISRname''_IRQHandler(void);

Regarding the ISR code, yes, your ISR should only use FromISR versions of the FreeRTOS functions.

Bernard (Ac6)