Wait after Reset on APB peripheral reset register?
Hello
Does anyone of you know, if i have to wait some CPU cycles after reseting an Peripherial in the APB peripheral reset register 1 (RCC_APB1RSTR) or register 2 (RCC_APB2RSTR)?
The SPL does it without a wait, but they call a function to do the reset and release the reset, I think this will automatically force some CPU cycles between setting the reset bit and release the reset bit.
/* Enable I2C1 reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
/* Release I2C1 from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
I want to do it like this:
/* Enable I2C1 reset state */
RCC->APB1RSTR |= RCC_APB1Periph_I2C1;
/* Release I2C1 from reset state */
RCC->APB1RSTR &= ~RCC_APB1Periph_I2C1;
Is this a problem with the timing? Do I have to wait? And how many cycles?
Do I have to wait some cycles between set the reset bit and release the reset bit?
And do I have to wait also some cycles bevore I acces the registers afterwords to configure the I2C?
I thank you verry much for your expertise.
Best regards
Matthias