#ifndef HSE_VALUE
#define HSE_VALUE 8000000UL
#endif

#ifndef HSI_VALUE
#define HSI_VALUE 16000000UL
#endif

#include "stm32f4xx.h"
#include "stm32f4xx_ll_bus.h"
#include "stm32f4xx_ll_rcc.h"
#include "stm32f4xx_ll_usart.h"
#include "stm32f4xx_ll_gpio.h"

int main(void)
{
	LL_RCC_HSE_Enable();
	LL_RCC_HSI_Disable();
	LL_RCC_LSE_Disable();

	LL_RCC_PLL_Disable();
	LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_12, 135, LL_RCC_PLLP_DIV_2);
	LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSE);
	LL_RCC_PLL_Enable();

	LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
	LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_4);
	LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_2);

	LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA);
	LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA);
	LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);

	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
	LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);

	LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_9, LL_GPIO_AF_7);
	LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_10, LL_GPIO_AF_7);

	LL_USART_InitTypeDef usart_init;
	usart_init.BaudRate = 115200;
	usart_init.DataWidth = LL_USART_PARITY_NONE;
	usart_init.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
	usart_init.OverSampling = LL_USART_OVERSAMPLING_16;
	usart_init.TransferDirection = LL_USART_DIRECTION_TX_RX;
	usart_init.Parity = LL_USART_PARITY_NONE;

    LL_USART_Disable(USART1);
	LL_USART_Init(USART1, &usart_init);
	LL_USART_Enable(USART1);

	while(1)
		LL_USART_TransmitData8(USART1, '*');
}

