Open On-Chip Debugger 0.10.0-dev-00302-gc211ca5-dirty (2017-07-03-10:41)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 16 command.c:546 command_print(): debug_level: 3
Debug: 14 16 options.c:98 add_default_dirs(): bindir=/src/staging/openocd/win32/bin
Debug: 15 16 options.c:99 add_default_dirs(): pkgdatadir=/src/staging/openocd/win32/share/openocd
Debug: 16 16 options.c:100 add_default_dirs(): run_prefix=E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.15.0.201707031232/tools/openocd/bin
Debug: 17 16 configuration.c:44 add_script_search_dir(): adding C:\Documents and Settings\guido.tedeschi\Dati applicazioni/OpenOCD
Debug: 18 16 configuration.c:44 add_script_search_dir(): adding E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.15.0.201707031232/tools/openocd/bin/src/staging/openocd/win32/share/openocd/site
Debug: 19 16 configuration.c:44 add_script_search_dir(): adding E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.15.0.201707031232/tools/openocd/bin/src/staging/openocd/win32/share/openocd/scripts
Debug: 20 47 configuration.c:84 find_file(): found Stanza40 Debug.cfg
Debug: 21 63 configuration.c:84 find_file(): found E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.0.201707031232/resources/openocd/st_scripts/interface/stlink.cfg
Debug: 22 63 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 63 command.c:145 script_debug(): command - interface ocd_interface hla
Debug: 25 78 command.c:366 register_command_handler(): registering 'ocd_hla_device_desc'...
Debug: 26 78 command.c:366 register_command_handler(): registering 'ocd_hla_serial'...
Debug: 27 78 command.c:366 register_command_handler(): registering 'ocd_hla_layout'...
Debug: 28 78 command.c:366 register_command_handler(): registering 'ocd_hla_vid_pid'...
Debug: 29 78 command.c:366 register_command_handler(): registering 'ocd_hla_command'...
Debug: 30 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
Debug: 31 78 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink
Debug: 33 78 hla_interface.c:241 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2-1
Debug: 35 78 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2-1
Debug: 37 78 hla_interface.c:215 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x374b
Debug: 39 78 command.c:145 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x374b
Debug: 41 78 hla_interface.c:269 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
Debug: 42 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
Debug: 43 78 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
Debug: 44 78 hla_transport.c:193 hl_transport_select(): hl_transport_select
Debug: 45 78 command.c:366 register_command_handler(): registering 'ocd_hla'...
Debug: 46 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 47 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 48 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 49 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 51 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 52 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 53 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 54 78 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 55 78 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
Debug: 56 94 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config none
Debug: 57 94 command.c:145 script_debug(): command - reset_config ocd_reset_config none
User : 59 94 command.c:546 command_print(): none separate
Debug: 60 94 configuration.c:84 find_file(): found E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.0.201707031232/resources/openocd/st_scripts/target/stm32f4x.cfg
Debug: 61 110 configuration.c:84 find_file(): found E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.0.201707031232/resources/openocd/st_scripts/target/swj-dp.tcl
Debug: 62 110 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 63 110 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 64 110 configuration.c:84 find_file(): found E:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.0.201707031232/resources/openocd/st_scripts/mem_helper.tcl
Debug: 65 110 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
Debug: 66 110 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
Debug: 68 110 command.c:1100 help_add_command(): added 'mrw' help text
Debug: 69 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
Debug: 70 125 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
Debug: 72 125 command.c:1113 help_add_command(): added 'mrw' help text
Debug: 73 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
Debug: 74 125 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
Debug: 76 125 command.c:1100 help_add_command(): added 'mmw' help text
Debug: 77 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 78 125 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 80 125 command.c:1113 help_add_command(): added 'mmw' help text
Debug: 81 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 82 125 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 83 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 84 125 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 85 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 86 125 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 87 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 88 125 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 89 125 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap STM32F411RETx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x2ba01477
Debug: 90 125 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap STM32F411RETx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x2ba01477
Debug: 91 125 hla_tcl.c:118 jim_hl_newtap_cmd(): Creating New Tap, Chip: STM32F411RETx, Tap: cpu, Dotted: STM32F411RETx.cpu, 8 params
Debug: 92 125 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irlen
Debug: 93 125 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -ircapture
Debug: 94 125 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irmask
Debug: 95 125 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 96 141 core.c:1306 jtag_tap_init(): Created Tap: STM32F411RETx.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 97 141 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 98 141 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 99 141 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create STM32F411RETx.cpu cortex_m -endian little -chain-position STM32F411RETx.cpu
Debug: 100 141 command.c:145 script_debug(): command - ocd_target ocd_target create STM32F411RETx.cpu cortex_m -endian little -chain-position STM32F411RETx.cpu
Info : 101 141 target.c:5223 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Debug: 102 141 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 103 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 104 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 105 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 106 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 107 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 108 141 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 109 141 command.c:366 register_command_handler(): registering 'ocd_tpiu'...
Debug: 110 141 command.c:366 register_command_handler(): registering 'ocd_itm'...
Debug: 111 141 command.c:366 register_command_handler(): registering 'ocd_itm'...
Debug: 112 141 hla_target.c:353 adapter_target_create(): adapter_target_create
Debug: 113 141 hla_target.c:324 adapter_init_arch_info(): adapter_init_arch_info
Debug: 114 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 115 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 116 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 117 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 118 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 119 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 120 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 121 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 122 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 123 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 124 141 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 125 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 126 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 127 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 128 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 129 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 130 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 131 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 132 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 133 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 134 156 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 135 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 136 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 137 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 138 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 139 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 140 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 141 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 142 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 143 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 144 172 command.c:366 register_command_handler(): registering 'ocd_STM32F411RETx.cpu'...
Debug: 145 172 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -work-area-phys 0x20000000 -work-area-size 0x8000 -work-area-backup 0
Debug: 146 172 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -work-area-phys 0x20000000 -work-area-size 0x8000 -work-area-backup 0
Debug: 147 172 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 148 172 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 149 172 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 150 172 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank STM32F411RETx.flash stm32f2x 0 0 0 0 STM32F411RETx.cpu
Debug: 151 172 command.c:145 script_debug(): command - ocd_flash ocd_flash bank STM32F411RETx.flash stm32f2x 0 0 0 0 STM32F411RETx.cpu
Debug: 153 172 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 154 172 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 155 172 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 156 172 tcl.c:1031 handle_flash_bank_command(): 'stm32f2x' driver usage field missing
Debug: 157 172 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1800
Debug: 158 172 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1800
Debug: 160 172 core.c:1633 jtag_config_khz(): handle jtag khz
Debug: 161 172 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 162 172 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 163 172 command.c:546 command_print(): adapter speed: 1800 kHz
Debug: 164 172 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
Debug: 165 188 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
User : 167 188 command.c:546 command_print(): adapter_nsrst_delay: 100
Debug: 168 188 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 169 188 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 170 188 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 171 188 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 172 188 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event examine-end
global ENABLE_LOW_POWER
global STOP_WATCHDOG
if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE0042008 0x00001800 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_APB1_FZ |= ~(DBG_IWDG_STOP | DBG_WWDG_STOP)
mmw 0xE0042008 0 0x00001800
}
Debug: 173 188 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event examine-end
global ENABLE_LOW_POWER
global STOP_WATCHDOG
if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE0042008 0x00001800 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_APB1_FZ |= ~(DBG_IWDG_STOP | DBG_WWDG_STOP)
mmw 0xE0042008 0 0x00001800
}
Debug: 174 188 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
Debug: 175 203 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0
Debug: 176 203 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event reset-start
adapter_khz 1800
Debug: 177 203 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event reset-start
adapter_khz 1800
Debug: 178 203 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event reset-init
global _CLOCK_FREQ
echo "configuring PLL"
# Configure PLL to boost clock to HSI x 8 (64 MHz)
mww 0x40023800 0x00008a81 ;# RCC_CR = HSICAL[bogus = 138] | HSITRIM[16] | HSION (reset value)
mww 0x40023808 0x00000000 ;# RCC_CFGR = (all = div1), select HSI as main clock source. (reset value)
mww 0x4002380c 0x00000000 ;# RCC_CIR = 0, all off. (reset value)
mww 0x40023804 0x24403010 ;# RCC_PLLCFGR = PLLQ[div4] | PLLSRC[HSI] | PLLP[div2] | PLLN[mul192] | PLLM[div16] (reset value)
mww 0x40023c00 0x00000103 ;# FLASH_ACR = PRFTEN | LATENCY[2] (we'll run at 84 MHz, see section 3.5.1, table 10 and table 11)
mww 0x40023800 0x01008a81 ;# RCC_CR = PLLON | HSICAL[bogus = 138] | HSITRIM[16] | HSION (enable PLL)
sleep 10 ;# Wait for PLL to lock
mww 0x40023808 0x00000002 ;# RCC_CFGR = (all = div1), select PLL as main clock source. (we should now run at 84 MHz)
adapter_khz $_CLOCK_FREQ
Debug: 179 203 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event reset-init
global _CLOCK_FREQ
echo "configuring PLL"
# Configure PLL to boost clock to HSI x 8 (64 MHz)
mww 0x40023800 0x00008a81 ;# RCC_CR = HSICAL[bogus = 138] | HSITRIM[16] | HSION (reset value)
mww 0x40023808 0x00000000 ;# RCC_CFGR = (all = div1), select HSI as main clock source. (reset value)
mww 0x4002380c 0x00000000 ;# RCC_CIR = 0, all off. (reset value)
mww 0x40023804 0x24403010 ;# RCC_PLLCFGR = PLLQ[div4] | PLLSRC[HSI] | PLLP[div2] | PLLN[mul192] | PLLM[div16] (reset value)
mww 0x40023c00 0x00000103 ;# FLASH_ACR = PRFTEN | LATENCY[2] (we'll run at 84 MHz, see section 3.5.1, table 10 and table 11)
mww 0x40023800 0x01008a81 ;# RCC_CR = PLLON | HSICAL[bogus = 138] | HSITRIM[16] | HSION (enable PLL)
sleep 10 ;# Wait for PLL to lock
mww 0x40023808 0x00000002 ;# RCC_CFGR = (all = div1), select PLL as main clock source. (we should now run at 84 MHz)
adapter_khz $_CLOCK_FREQ
Debug: 180 219 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event gdb-attach
global CONNECT_UNDER_RESET
# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
if { [expr ($CONNECT_UNDER_RESET == 1)] } {
reset init
}
Debug: 181 219 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event gdb-attach
global CONNECT_UNDER_RESET
# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
if { [expr ($CONNECT_UNDER_RESET == 1)] } {
reset init
}
Debug: 182 219 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
Debug: 183 219 command.c:145 script_debug(): command - gdb_port ocd_gdb_port 3333
Debug: 185 250 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 186 250 command.c:145 script_debug(): command - init ocd_init
Debug: 188 250 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 189 250 command.c:145 script_debug(): command - ocd_target ocd_target init
Debug: 191 250 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 192 250 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 193 250 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu cget -event gdb-flash-erase-start
Debug: 194 266 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu cget -event gdb-flash-erase-start
Debug: 195 266 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event gdb-flash-erase-start reset init
Debug: 196 266 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event gdb-flash-erase-start reset init
Debug: 197 266 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu cget -event gdb-flash-write-end
Debug: 198 266 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu cget -event gdb-flash-write-end
Debug: 199 266 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F411RETx.cpu configure -event gdb-flash-write-end reset halt
Debug: 200 266 command.c:145 script_debug(): command - ocd_STM32F411RETx.cpu ocd_STM32F411RETx.cpu configure -event gdb-flash-write-end reset halt
Debug: 201 266 target.c:1308 handle_target_init_command(): Initializing targets...
Debug: 202 266 hla_target.c:343 adapter_init_target(): adapter_init_target
Debug: 203 266 command.c:366 register_command_handler(): registering 'ocd_target_request'...
Debug: 204 266 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 205 266 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 206 266 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 207 266 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
Debug: 208 266 command.c:366 register_command_handler(): registering 'ocd_profile'...
Debug: 209 266 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 210 266 command.c:366 register_command_handler(): registering 'ocd_reg'...
Debug: 211 266 command.c:366 register_command_handler(): registering 'ocd_poll'...
Debug: 212 266 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 213 266 command.c:366 register_command_handler(): registering 'ocd_halt'...
Debug: 214 266 command.c:366 register_command_handler(): registering 'ocd_resume'...
Debug: 215 266 command.c:366 register_command_handler(): registering 'ocd_reset'...
Debug: 216 266 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 217 266 command.c:366 register_command_handler(): registering 'ocd_step'...
Debug: 218 266 command.c:366 register_command_handler(): registering 'ocd_mdw'...
Debug: 219 266 command.c:366 register_command_handler(): registering 'ocd_mdh'...
Debug: 220 281 command.c:366 register_command_handler(): registering 'ocd_mdb'...
Debug: 221 281 command.c:366 register_command_handler(): registering 'ocd_mww'...
Debug: 222 281 command.c:366 register_command_handler(): registering 'ocd_mwh'...
Debug: 223 281 command.c:366 register_command_handler(): registering 'ocd_mwb'...
Debug: 224 281 command.c:366 register_command_handler(): registering 'ocd_bp'...
Debug: 225 281 command.c:366 register_command_handler(): registering 'ocd_rbp'...
Debug: 226 281 command.c:366 register_command_handler(): registering 'ocd_wp'...
Debug: 227 281 command.c:366 register_command_handler(): registering 'ocd_rwp'...
Debug: 228 281 command.c:366 register_command_handler(): registering 'ocd_load_image'...
Debug: 229 281 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
Debug: 230 281 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
Debug: 231 281 command.c:366 register_command_handler(): registering 'ocd_test_image'...
Debug: 232 281 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 233 281 command.c:366 register_command_handler(): registering 'ocd_ps'...
Debug: 234 281 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
Debug: 235 281 hla_interface.c:111 hl_interface_init(): hl_interface_init
Debug: 236 297 hla_layout.c:91 hl_layout_init(): hl_layout_init
Debug: 237 297 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 238 297 core.c:1603 adapter_khz_to_speed(): have interface set up
Debug: 239 297 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 240 297 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 241 297 core.c:1388 adapter_init(): clock speed 1800 kHz
Debug: 242 297 openocd.c:137 handle_init_command(): Debug Adapter init complete
Debug: 243 297 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 244 297 command.c:145 script_debug(): command - ocd_transport ocd_transport init
Debug: 246 297 transport.c:240 handle_transport_init(): handle_transport_init
Debug: 247 297 hla_transport.c:154 hl_transport_init(): hl_transport_init
Debug: 248 297 hla_transport.c:171 hl_transport_init(): current transport hla_swd
Debug: 249 297 hla_interface.c:44 hl_interface_open(): hl_interface_open
Debug: 250 297 hla_layout.c:42 hl_layout_open(): hl_layout_open
Debug: 251 297 stlink_usb.c:1786 stlink_usb_open(): stlink_usb_open
Debug: 252 297 stlink_usb.c:1802 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x374b serial:
Info : 253 625 stlink_usb.c:636 stlink_usb_version(): STLINK v2 JTAG v28 API v2 M v18 VID 0x0483 PID 0x374B
Info : 254 625 stlink_usb.c:1920 stlink_usb_open(): using stlink api v2
Debug: 255 625 stlink_usb.c:860 stlink_usb_init_mode(): MODE: 0x02
Info : 256 641 stlink_usb.c:668 stlink_usb_check_voltage(): Target voltage: 3.252174
Debug: 257 641 stlink_usb.c:915 stlink_usb_init_mode(): MODE: 0x01
Debug: 258 641 stlink_usb.c:941 stlink_usb_init_mode(): MODE: 0x02
Debug: 259 641 stlink_usb.c:1947 stlink_usb_open(): Supported SWD clock speeds are:
Debug: 260 641 stlink_usb.c:1950 stlink_usb_open(): 4000 kHz
Debug: 261 641 stlink_usb.c:1950 stlink_usb_open(): 1800 kHz
Debug: 262 641 stlink_usb.c:1950 stlink_usb_open(): 1200 kHz
Debug: 263 641 stlink_usb.c:1950 stlink_usb_open(): 950 kHz
Debug: 264 641 stlink_usb.c:1950 stlink_usb_open(): 480 kHz
Debug: 265 641 stlink_usb.c:1950 stlink_usb_open(): 240 kHz
Debug: 266 641 stlink_usb.c:1950 stlink_usb_open(): 125 kHz
Debug: 267 641 stlink_usb.c:1950 stlink_usb_open(): 100 kHz
Debug: 268 641 stlink_usb.c:1950 stlink_usb_open(): 50 kHz
Debug: 269 641 stlink_usb.c:1950 stlink_usb_open(): 25 kHz
Debug: 270 641 stlink_usb.c:1950 stlink_usb_open(): 15 kHz
Debug: 271 641 stlink_usb.c:1950 stlink_usb_open(): 5 kHz
Debug: 272 656 stlink_usb.c:1971 stlink_usb_open(): Using TAR autoincrement: 4096
Debug: 273 656 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 274 656 core.c:731 jtag_add_reset(): SRST line released
Debug: 276 656 core.c:755 jtag_add_reset(): TRST line released
Debug: 277 656 core.c:329 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 278 656 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
Debug: 279 656 stlink_usb.c:966 stlink_usb_idcode(): IDCODE: 0x2BA01477
Debug: 280 656 openocd.c:150 handle_init_command(): Examining targets...
Debug: 281 656 target.c:1501 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 282 656 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 283 656 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x410fc241
Debug: 284 656 cortex_m.c:1933 cortex_m_examine(): Cortex-M4 r0p1 processor detected
Debug: 285 672 cortex_m.c:1941 cortex_m_examine(): cpuid: 0x410fc241
Debug: 286 672 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ef40 4 1
Debug: 287 672 target.c:2226 target_read_u32(): address: 0xe000ef40, value: 0x10110021
Debug: 288 672 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ef44 4 1
Debug: 289 672 target.c:2226 target_read_u32(): address: 0xe000ef44, value: 0x11000011
Debug: 290 672 cortex_m.c:1949 cortex_m_examine(): Cortex-M4 floating point feature FPv4_SP found
Debug: 291 672 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 292 672 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 293 688 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
Debug: 294 688 target.c:2226 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug: 295 688 target.c:2314 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 296 688 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
Debug: 297 688 target.c:2314 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 298 688 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
Debug: 299 688 target.c:2314 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 300 688 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
Debug: 301 703 target.c:2314 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 302 719 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
Debug: 303 719 target.c:2314 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 304 719 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1
Debug: 305 719 target.c:2314 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 306 719 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1
Debug: 307 719 target.c:2314 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 308 719 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1
Debug: 309 719 target.c:2314 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 310 719 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1
Debug: 311 735 cortex_m.c:2032 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2
Debug: 312 735 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
Debug: 313 735 target.c:2226 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 314 735 target.c:2314 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 315 735 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
Debug: 316 735 target.c:2314 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 317 735 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
Debug: 318 735 target.c:2314 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 319 735 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1
Debug: 320 735 target.c:2314 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 321 735 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1
Debug: 322 750 cortex_m.c:1847 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 323 750 cortex_m.c:2042 cortex_m_examine(): STM32F411RETx.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 324 750 target.c:1501 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 325 750 target.c:4256 target_handle_event(): target: (0) STM32F411RETx.cpu (hla_target) event: 22 (examine-end) action:
global ENABLE_LOW_POWER
global STOP_WATCHDOG
if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE0042008 0x00001800 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_APB1_FZ |= ~(DBG_IWDG_STOP | DBG_WWDG_STOP)
mmw 0xE0042008 0 0x00001800
}
Debug: 326 750 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 327 813 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 0
Debug: 328 813 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 0
Debug: 330 813 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 331 813 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042008 4 1
Debug: 332 828 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042008 6144
Debug: 333 828 command.c:145 script_debug(): command - mww ocd_mww 0xE0042008 6144
Debug: 335 828 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042008 4 1
Debug: 336 828 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 337 828 command.c:145 script_debug(): command - ocd_flash ocd_flash init
Debug: 339 860 tcl.c:1097 handle_flash_init_command(): Initializing flash devices...
Debug: 340 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 341 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 342 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 343 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 344 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 345 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 346 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 347 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 348 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 349 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 350 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 351 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 352 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 353 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 354 860 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 355 860 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 356 860 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 358 875 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
Debug: 359 875 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 360 875 command.c:145 script_debug(): command - ocd_nand ocd_nand init
Debug: 362 875 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 363 875 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 364 875 command.c:145 script_debug(): command - ocd_pld ocd_pld init
Debug: 366 891 pld.c:207 handle_pld_init_command(): Initializing PLDs...