ERROR: timed out while waiting for target halted
Hi!
I’m trying to debug my STM32F7 board:
https://github.com/sambas/hw/tree/master/AnyFCF7
With an ST-link v2 Mini.
I have connected all 4 SWD wires plus the RST wire into the board, so 5 wires connected. I can see from the electrical diagram of my board that the RST pin is connected directly to the NRST pin of the MCU.
Now I try to run opencd (v0.11.0) + gdb :
```
$ openocd -f /usr/local/share/openocd/scripts/interface/stlink.cfg -f /usr/local/share/openocd/scripts/target/stm32f7x.cfg
Open On-Chip Debugger 0.11.0-dirty (2021-09-27-19:23)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport “hla_swd”. To override use ‘transport select ‘.
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : clock speed 2000 kHz
Info : STLINK V2J17S4 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.235813
Warn : Silicon bug: single stepping may enter pending exception handler!
Info : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpoints
Info : starting gdb server for stm32f7x.cpu on 3333
Info : Listening on port 3333 for gdb connections
Info : accepting ‘gdb’ connection on tcp/3333
target halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x0800027e msp: 0x2004ffd8
Info : device id = 0x10016449
Info : flash size = 1024 kbytes
Info : flash size = 1024 bytes
Warn : Prefer GDB command “target extended-remote 3333” instead of “target remote 3333”
Error: timed out while waiting for target halted
TARGET: stm32f7x.cpu - Not halted
```
Why am I getting this error, if I have connected the RST wire? I can solve the problem by removing “srst_only” from the stm32f7x.cfg, but my understanding is that then it will do a SW reset instead of HW reset. I would like to use the stock config instead of modify it. Since I have indeed HW support for doing a HW reset, I don’t see why I should be forced to do a SW reset.
Any hints?
Thanks!
;){kind=link}