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Zephyr project on STM32

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  • Debug STM32.
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Timer2 maximum clock frequency on nucleo f401

Hi,

reading the reference manual of stm32f401 processor (DM00096844), I would expect the timer 2 clock frequency to be the double of APB1 frequency when TIMPRE is 0, as I see in my case.
I measure something as 42 MHz, meaning that I am generating a pwm from tim2 oc1 with a 50 % duty cycle and measuring the period of this pwm. I see a period that is double of what I expected.

Questions:

1) Is it correct to expect 84 MHz, or the timer clock maximum frequency is limited to the set APB1 frequency?

2) Is there any other prescaler I am missing, for example in the OCx output?

Regards.

Hi,

just to say, I found what the problem was.

Actually I had another timer commanding the timer2, so the combination of master/slave determined half the frequency expected for the PWM.

So, using only timer 2 I measured the expected times for PWM, using a prescaler that normalizes in us.

Regards.


 

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