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System Workbench for STM32


Flashing and debugging of externally compiled program

>> Note: When creating a board, you can specify ST-Link version, After that SystemWorkbech will create the custom.cfg for you 😊

Great, I tried launch debug session with this .cfg but I still received the error: ..-+Error erasing flash with vFlashErase packet+-.

OpenOCD log is below. I think there is a problem with reset_config. I have connected stlink and my board only by 4 wires - VCC, SWDIO, SWDCLK and GND. Could it couse the problem?

Open On-Chip Debugger 0.9.0-dev-00418-g9afb8b4-dirty (2015-09-28-12:09)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_assert_srst
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v25 API v2 SWIM v0 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 2.946236
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'gdb' connection on tcp/3333
Error: timed out while waiting for target halted
TARGET: stm32f1x.cpu - Not halted
in procedure 'reset' 
in procedure 'ocd_bouncer'



Info : device id = 0x10036414
Info : flash size = 256kbytes
Error: timed out while waiting for target halted
TARGET: stm32f1x.cpu - Not halted
in procedure 'reset' 
in procedure 'ocd_bouncer'


Error: timed out while waiting for target halted
 
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