DWT
Data Watchpoint and Trace
DBG
0xE0001000
0x0
0x9
registers
CTRL
CTRL
Control register
0x0
0x20
read-write
0x00000000
CYCCNTENA
Enables CYCCNT
0
1
POSTPRESET
Reload value for the POSTCNT counter
1
4
POSTINIT
Initial value for the POSTCNT counter
5
4
CYCTAP
Selects the position of the POSTCNT tap on the CYCCNT counter
9
1
SYNCTAP
Selects the position of the synchronization packet counter tap on the CYCCNT counter
10
2
PCSAMPLENA
Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation
12
1
EXCTRCENA
Enables generation of exception trace
16
1
CPIEVTENA
Enables generation of the CPI counter overflow event
17
1
EXCEVTENA
Enables generation of the Exception overhead counter overflow event
18
1
SLEEPEVTENA
Enables generation of the Sleep counter overflow event
19
1
LSUEVTENA
Enables generation of the LSU counter overflow event
20
1
FOLDEVTENA
Enables generation of the Folded-instruction counter overflow event
21
1
CYCEVTENA
Enables POSTCNT underflow Event counter packets generation
22
1
NOPRFCNT
Profiling counters not supported
24
1
NOCYCCNT
Cycle counter not supported
25
1
NOEXTTRIG
External match signals not supported
26
1
NOTRCPKT
Trace sampling and exception tracing not supported
27
1
NUMCOMP
Number of comparators implemented
28
4
CYCCNT
CYCCNT
Processor cycle counter
0x4
0x20
read-write
0x00000000
CYCCNT
Incrementing cycle counter value
0
32